MULTI-VENDOR BASED BUSBAR PROTECTION SCHEME FOR TRANSMISSION NETWORKS
Ethical Ref. #: 2020FEREC-STD-040
Busbars are the common points of connection for all incoming and outgoing feeders, thus, busbars are critical components of transmission networks. The operation of busbars is affected by faults occurring on the busbar or faults that are carried through from the incoming and outgoing feeders. A fault in the incoming or outgoing feeders of a busbar can result in the system becoming unstable or experiencing a blackout, which requires a fast-operating protection scheme to quickly isolate the faulty section. This will minimize damage to faulty equipment and prevent interruption of supply in other healthy sections of the network. A busbar protection scheme must meet the basic protection requirements of the electrical system. The requirements include speed to detect and isolate faults, reliability to ensure the security of supply, sensitivity in detecting faults, and the scheme must always ensure that the power system is stable. These requirements are necessary for detecting busbar faults early, and to isolate the faulty equipment. Communication systems of intelligent electronic devices play a huge role in the performance of busbar protection schemes. They determine the effectiveness of the protection scheme in terms of detecting and isolating busbar faults. A literature survey has revealed that multiple proposed algorithms of busbar protection schemes have encountered a common problem of achieving interoperability between intelligent electronic devices produced by different vendors. This affects the performance of busbar protection schemes. This dissertation focuses on achieving interoperability between multi-vendor intelligent electronic devices “SEL and ABB”. The research study aimed to improve the performance of busbar protection schemes by introducing the IEC 61850 standard to enhance the communication system performance between the devices to reduce the fault clearance time. The research study was conducted by implementing hardware-in-the-loop (HIL) testing using a real-time digital simulator (RTDS). A laboratory-scale test bench was developed to achieve interoperability between the IEDs SEL-487B and REF615. A fault condition was simulated, and the behaviour of the protection scheme was analysed.
CPUT postgraduate bursary
ETDP SETA post graduate bursary
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